An Approach to Simplify Universal Logic Gates Using Majority Function

Abstract

There has always been a continuous urge to reduce power consumption in very large scale integration (VLSI) circuit design. Sometimes reduction in the total number of transistors in a fundamental logic gate helps to enhance power saving. But, there stands a tradeoff in between power, delay and size of the chip. Static and dynamic power gets escalated as the device dimension is scaled down and vice versa. In our approach, I aim at the reduction of power and delay by altering the generalized structure of conventional universal gates. This in turn will help to integrate more functions per unit area. Whole of the concept of transistor reduction is based around “Majority Function”. In general, majority gate is nothing but a logical gate that are being used in circuit complexity as well as in other applications of Boolean based circuits. A majority gate returns true if and only if more than 50% of its inputs are true. Any improvisation in the performance of these gates modified with majority function will lead to efficient corresponding change in VLSI logic device performance.